Many electronic designs are written at a register-transfer level (RTL) description of a circuit or system in a hardware description language. Generally, a RTL description describes what intermediate information (i.e. information stored between clock cycles in an electronic circuit) is stored in registers, where it is stored within the design, and how that information moves through the design as it operates. The RTL description of an electronic design is a functional description at least one level of abstraction higher than the individual gate layout of the electronic design system (e.g., gate-level implementation/Netlist). The RTL description fully and explicitly describes virtually all of the logic and sequential operations of the circuit. RTL descriptions are commonly written in standard languages such as Verilog or VHDL and are intended for logic synthesis and mapping with a commercial logic synthesizer.
One prior approach for performance analysis of an electronic design may include using a hardware performance monitor located at a fixed location such as in a processor or in a chipset connected to a system bus that is located within the electronic design. The hardware performance monitor can be monitoring on chip in silicon or with a RTL description as described above. The hardware performance monitor has a limited number of fixed non-configurable parameters to be monitored. These prior approaches are not able to quickly and efficiently monitor and analyze various parameters associated with electronic design performance early in the design cycle resulting in a longer design cycle and slower time to market for the design.